![]() Reducing node size, increasing density lowers yield as more defects are likely to occur. On the other hand trying work with transistors at the small end of what technology can do become more expensive. By analogy it's like using boxes designed for six eggs but only shipping one egg per box. ![]() Likely one can increase production and reduce unit cost by going smaller. Over the last decades, at any given point in time with the technology available at that time there has been an optimum number of transistors to put on wafers/chips so as to be most economically efficient.ĭesign with bigger process nodes and less transistors than the technology allows is wasteful. To the person who received a recommendation from the Raspberry Pi Foundation to post your question here, welcome to the forum! If nobody who knows the answer to your question answers it, I would suggest following up with your contact at the foundation with what happened. What's wrong with a person who might be working on a class or code-club style assignment trying to collect a little data for their report? My suspicion is Moore's law applies equally well to any price point in the performance spectrum, and even more so to the current low end. Unless you are referring to flux capacitors, I'm not sure what's silly about looking at how the transistor counts in a sequence of products such as the Pi B, 2B, 3B and 4B have changed over time. State of the art is likely the new Apple's M1 or ARM's N1, both of which are build on TMSC 7nm process. ![]() The processor chosen for the 4B was chosen for a price point/performance, it does not represent what was state of the art in the ARM world at the time it was launched. If you put a state of the art ARM chip in it it would be much much faster. Rough equivalencies in the SnapDragon universe will be around the 650 series. The SOC in the 4B is way down the ARM foodchain, and at Cortex-A72 designed in 2015 is at least 3 generations back. ![]()
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